/** @file
  Header file for MTL PCH devices PCI Bus Device Function map.

  Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
  SPDX-License-Identifier: BSD-2-Clause-Patent

**/

#ifndef _MTL_PCH_BDF_ASSIGNMENT_H_
#define _MTL_PCH_BDF_ASSIGNMENT_H_

#define MTL_PCH_SEGMENT_NUM      0
#define MTL_PCH_BUS_NUM          128

#define MTL_PCH_ESPI_DEVICE_NUM  31
#define MTL_PCH_ESPI_FUNCTION_NUM  0

#define MTL_PCH_P2SB_FUNCTION_NUM  1

#define MTL_PCH_PMC_FUNCTION_NUM  2

#define MTL_PCH_ACE_FUNCTION_NUM  3

#define MTL_PCH_SMBUS_FUNCTION_NUM  4

#define MTL_PCH_SPI_FUNCTION_NUM  5

#define MTL_PCH_GBE_FUNCTION_NUM  6

#define MTL_PCH_NPK_FUNCTION_NUM  7

#define MTL_PCH_SERIALIO_UART0_DEVICE_NUM  30
#define MTL_PCH_SERIALIO_UART0_FUNCTION_NUM  0

#define MTL_PCH_SERIALIO_UART1_DEVICE_NUM  30
#define MTL_PCH_SERIALIO_UART1_FUNCTION_NUM  1

#define MTL_PCH_SERIALIO_SPI0_DEVICE_NUM  30
#define MTL_PCH_SERIALIO_SPI0_FUNCTION_NUM  2

#define MTL_PCH_SERIALIO_SPI1_DEVICE_NUM  30
#define MTL_PCH_SERIALIO_SPI1_FUNCTION_NUM  3

#define MTL_PCH_TSN_GBE0_FUNCTION_NUM  4

#define MTL_PCH_TSN_GBE1_FUNCTION_NUM  5

#define MTL_PCH_PCIE_RP9_DEVICE_NUM  29
#define MTL_PCH_PCIE_RP9_FUNCTION_NUM  0

#define MTL_PCH_PCIE_RP10_FUNCTION_NUM  1

#define MTL_PCH_PCIE_RP11_FUNCTION_NUM  2

#define MTL_PCH_PCIE_RP12_FUNCTION_NUM  3

#define MTL_PCH_PCIE_RP13_DEVICE_NUM  29
#define MTL_PCH_PCIE_RP13_FUNCTION_NUM  4

#define MTL_PCH_PCIE_RP14_FUNCTION_NUM  5

#define MTL_PCH_PCIE_RP15_FUNCTION_NUM  6

#define MTL_PCH_PCIE_RP16_FUNCTION_NUM  7

#define MTL_PCH_PCIE_RP1_DEVICE_NUM  28
#define MTL_PCH_PCIE_RP1_FUNCTION_NUM  0

#define MTL_PCH_PCIE_RP2_FUNCTION_NUM  1

#define MTL_PCH_PCIE_RP3_FUNCTION_NUM  2

#define MTL_PCH_PCIE_RP4_FUNCTION_NUM  3

#define MTL_PCH_PCIE_RP5_DEVICE_NUM  28
#define MTL_PCH_PCIE_RP5_FUNCTION_NUM  4

#define MTL_PCH_PCIE_RP6_FUNCTION_NUM  5

#define MTL_PCH_PCIE_RP7_FUNCTION_NUM  6

#define MTL_PCH_PCIE_RP8_FUNCTION_NUM  7

#define MTL_PCH_PCIE_RP17_DEVICE_NUM  27
#define MTL_PCH_PCIE_RP17_FUNCTION_NUM  0

#define MTL_PCH_PCIE_RP18_FUNCTION_NUM  1

#define MTL_PCH_PCIE_RP19_FUNCTION_NUM  2

#define MTL_PCH_PCIE_RP20_FUNCTION_NUM  3

#define MTL_PCH_PCIE_RP21_DEVICE_NUM  27
#define MTL_PCH_PCIE_RP21_FUNCTION_NUM  4

#define MTL_PCH_PCIE_RP22_FUNCTION_NUM  5

#define MTL_PCH_PCIE_RP23_FUNCTION_NUM  6

#define MTL_PCH_PCIE_RP24_FUNCTION_NUM  7

#define MTL_PCH_SERIALIO_I2C4_DEVICE_NUM  25
#define MTL_PCH_SERIALIO_I2C4_FUNCTION_NUM  0

#define MTL_PCH_SERIALIO_I2C5_DEVICE_NUM  25
#define MTL_PCH_SERIALIO_I2C5_FUNCTION_NUM  1

#define MTL_PCH_SERIALIO_UART2_DEVICE_NUM  25
#define MTL_PCH_SERIALIO_UART2_FUNCTION_NUM  2

#define MTL_PCH_SATA_FUNCTION_NUM  0

#define MTL_PCH_HECI1_FUNCTION_NUM  0

#define MTL_PCH_HECI2_FUNCTION_NUM  1

#define MTL_PCH_IDER_FUNCTION_NUM  2

#define MTL_PCH_KT_FUNCTION_NUM  3

#define MTL_PCH_HECI3_FUNCTION_NUM  4

#define MTL_PCH_HECI4_FUNCTION_NUM  5

#define MTL_PCH_SERIALIO_I2C0_DEVICE_NUM  21
#define MTL_PCH_SERIALIO_I2C0_FUNCTION_NUM  0

#define MTL_PCH_SERIALIO_I2C1_DEVICE_NUM  21
#define MTL_PCH_SERIALIO_I2C1_FUNCTION_NUM  1

#define MTL_PCH_SERIALIO_I2C2_DEVICE_NUM  21
#define MTL_PCH_SERIALIO_I2C2_FUNCTION_NUM  2

#define MTL_PCH_SERIALIO_I2C3_DEVICE_NUM  21
#define MTL_PCH_SERIALIO_I2C3_FUNCTION_NUM  3

#define MTL_PCH_SERIALIO_I3C_FUNCTION_NUM  4

#define MTL_PCH_XHCI_FUNCTION_NUM  0

#define MTL_PCH_XDCI_FUNCTION_NUM  1

#define MTL_PCH_PMC_SSRAM_FUNCTION_NUM  2

#define MTL_PCH_CNVI_WIFI_FUNCTION_NUM  3

#define MTL_PCH_EAH_FUNCTION_NUM  5

#define MTL_PCH_SERIALIO_SPI3_DEVICE_NUM  19
#define MTL_PCH_SERIALIO_SPI3_FUNCTION_NUM  0

#define MTL_PCH_SERIALIO_UART3_DEVICE_NUM  19
#define MTL_PCH_SERIALIO_UART3_FUNCTION_NUM  1

#define MTL_PCH_ISH_FUNCTION_NUM  0

#define MTL_PCH_SERIALIO_SPI2_DEVICE_NUM  18
#define MTL_PCH_SERIALIO_SPI2_FUNCTION_NUM  6

#define MTL_PCH_THC0_FUNCTION_NUM  0

#define MTL_PCH_THC1_FUNCTION_NUM  1

#endif